The CS18LV40965 is a high performance, high speed, and super low power CMOS Static Random Access Memory organized as 524,288 words by 8 bits and operates from a wide range of 4.5 to 5.5V supply voltage.

Advanced 0.15um CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.5uA and maximum access time of 55/70ns in 5.0V
operation.

The CS18LV40965 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The CS18LV40965 is available in JEDEC standard 32-pin sTSOP 1 -8x13.4 mm, TSOP 1 -8x20mm, TSOP 2 -400mil, SOP -450 mil and PDIP –600mil packages