The CS26LV64173 is a high performance, high speed, low power Pseudo SRAM organized as 4,194,304 words by 16 bits and operates from a wide range of 2.7 to 3.6V supply voltage. Advanced DRAM technology and circuit techniques provide both high speed and low power features with a maximum standby current of
180uA and maximum access time of 70ns in 2.7 to 3.6V operation.

The CS26LV64173 available package type is 48-pin BGA.
The device includes several Power Saving modes : Temperature Controlled Refresh (TCR), Partial Array
Refresh (PAR) and Deep Power Down (DPD). Both these modes reduce standby current.
The efficient Page Read Mode, data can be read by only changing A0-A3 when A4-A21 is fixed, while
/CE1=L, CE2=H, /WE=H, /OE=L, /UB=L, /LB=L.